The perl code creates tags for verilog/system verilog/vhdl code for browsing the code with functionalities similar to ctags
Current version supports Verilog and System-Verilog. VHDL would be supported soon! Only module names are tagged.
Usual ctags commands work:
Ctrl-] : Find the tag under the cursor.
Ctrl-T : Return to previous location before jump to tag (not widely implemented).
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